? semiconductor components industries, llc, 2005 february, 2005 ? rev. 5 1 publication order number: mc14094b/d mc14094b 8-stage shift/store register with three-state outputs the mc14094b combines an 8?stage shift register with a data latch for each stage and a 3?state output from each latch. data is shifted on the positive clock transition and is shifted from the seventh stage to two serial outputs. the q s output data is for use in high?speed cascaded systems. the q s output data is shifted on the following negative clock transition for use in low?speed cascaded systems. data from each stage of the shift register is latched on the negative transition of the strobe input. data propagates through the latch while strobe is high. outputs of the eight data latches are controlled by 3?state buffers which are placed in the high?impedance state by a logic low on output enable. features ? 3?state outputs ? capable of driving two low?power ttl loads or one low?power schottky ttl load over the rated temperature range ? input diode protection ? data latch ? dual outputs for data out on both positive and negative clock transitions ? useful for serial?to?parallel data conversion ? pin?for?pin compatible with cd4094b ? pb?free packages are available* maximum ratings (voltages referenced to v ss ) symbol parameter value unit v dd dc supply voltage range ?0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) ?0.5 to v dd + 0.5 v i in , i out input or output current (dc or transient) per pin 10 ma p d power dissipation, per package (note 1) 500 mw t a ambient temperature range ?55 to +125 c t stg storage temperature range ?65 to +150 c t l lead temperature (8?second soldering) 260 c 1. temperature derating: plastic ap and d/dwo packages: 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com marking diagrams pdip?16 p suffix case 648 mc14094bcp awlyyww soic?16 d suffix case 751b tssop?16 dt suffix case 948f 14094b awlyww 14 094b alyw a = assembly location wl, l = wafer lot yy, y = year ww, w = work week soeiaj?16 f suffix case 966 mc14094b awlyww see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 16 1 1 16 1 16 1 16 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc14094b http://onsemi.com 2 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 q7 q6 q5 output enable v dd q s q s q8 q1 clock data strobe v ss q4 q3 q2 pin assignment truth table output parallel outputs serial outputs clock o u tp u t enable strobe data q1 q n q s * q s 0 x x z z q7 no chg. 0 x x z z no chg. q7 1 0 x no chg. no chg. q7 no chg. 1 1 0 0 q n ?1 q7 no chg. 1 1 1 1 q n ?1 q7 no chg. 1 1 1 no chg. no chg. no chg. q7 z = high impedance x = don't care * at the positive clock edge, information in the 7th shift register stage is transferred to q8 and q s . ordering information device package shipping 2 mc14094bcp pdip?16 500 units / rail mc14094bcpg pdip?16 (pb?free) 500 units / rail mc14094bd soic?16 48 units / rail mc14094bdg soic?16 (pb?free) 48 units / rail MC14094BDR2 soic?16 2500 units / tape & reel MC14094BDR2g soic?16 (pb?free) 2500 units / tape & reel mc14094bdtr2 tssop?16* 2500 units / tape & reel mc14094bf soeiaj?16 50 units / rail mc14094bfg soeiaj?16 (pb?free) 50 units / rail mc14094bfel soeiaj?16 2000 units / tape & reel mc14094bfelg soeiaj?16 (pb?free) 2000 units / tape & reel 2for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb?free.
mc14094b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? electrical characteristics (voltages referenced to v ss ) ?????????? ?????????? ???? ???? ??? ??? v dd ????? ????? ? 55 c ????????? ????????? 25 c ????? ????? 125 c ??? ??? ?????????? ?????????? characteristic ???? ???? symbol ??? ??? v dd vdc ??? ??? min ??? ??? max ???? ???? min ??? ??? typ (2) ???? ???? max ??? ??? min ??? ??? max ??? ??? unit ?????????? ? ???????? ? ?????????? output voltage a0o level v in = v dd or 0 ???? ? ?? ? ???? v ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 0.05 0.05 0.05 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 0 0 0 ???? ? ?? ? ???? 0.05 0.05 0.05 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 0.05 0.05 0.05 ??? ? ? ? ??? vdc ?????????? ? ???????? ? ?????????? a1o level v in = 0 or v dd ???? ? ?? ? ???? v oh ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 4.95 9.95 14.95 ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ?????????? input voltage a0o level (v o = 4.5 or 0.5 vdc) (v o = 9.0 or 1.0 vdc) (v o = 13.5 or 1.5 vdc) ???? ? ?? ? ? ?? ? ???? v il ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? ? ? ? ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ???? ? ?? ? ? ?? ? ???? ? ? ? ??? ? ? ? ? ? ? ??? 2.25 4.50 6.75 ???? ? ?? ? ? ?? ? ???? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? ? ? ? ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ?????????? a1o level (v o = 0.5 or 4.5 vdc) (v o = 1.0 or 9.0 vdc) (v o = 1.5 or 13.5 vdc) ???? ? ?? ? ? ?? ? ???? v ih ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? ? ? ? ???? ? ?? ? ? ?? ? ???? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? 2.75 5.50 8.25 ???? ? ?? ? ? ?? ? ???? ? ? ? ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? ? ? ? ??? ? ? ? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ? ???????? ? ?????????? output drive current (v oh = 2.5 vdc) source (v oh = 4.6 vdc) (v oh = 9.5 vdc) (v oh = 13.5 vdc) ???? ? ?? ? ? ?? ? ? ?? ? ???? i oh ??? ? ? ? ? ? ? ? ? ? ??? 5.0 5.0 10 15 ??? ? ? ? ? ? ? ? ? ? ??? 3.0 0.64 1.6 4.2 ??? ? ? ? ? ? ? ? ? ? ??? ? ? ? ? ???? ? ?? ? ? ?? ? ? ?? ? ???? 2.4 0.51 1.3 3.4 ??? ? ? ? ? ? ? ? ? ? ??? 4.2 0.88 2.25 8.8 ???? ? ?? ? ? ?? ? ? ?? ? ???? ? ? ? ? ??? ? ? ? ? ? ? ? ? ? ??? 1.7 0.36 0.9 2.4 ??? ? ? ? ? ? ? ? ? ? ??? ? ? ? ? ??? ? ? ? ? ? ? ? ? ? ??? madc ?????????? ? ???????? ? ?????????? (v ol = 0.4 vdc) sink (v ol = 0.5 vdc) (v ol = 1.5 vdc) ???? ? ?? ? ???? i ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 0.64 1.6 4.2 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 0.51 1.3 3.4 ??? ? ? ? ??? 0.88 2.25 8.8 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 0.36 0.9 2.4 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? madc ?????????? ?????????? input current ???? ???? i in ??? ??? 15 ??? ??? - ??? ??? 0.1 ???? ???? - ??? ??? 0.00001 ???? ???? 0.1 ??? ??? - ??? ??? 1.0 ??? ??? adc ?????????? ? ???????? ? ?????????? input capacitance (v in = 0) ???? ? ?? ? ???? c in ??? ? ? ? ??? ? ??? ? ? ? ??? ? ??? ? ? ? ??? ? ???? ? ?? ? ???? ? ??? ? ? ? ??? 5.0 ???? ? ?? ? ???? 7.5 ??? ? ? ? ??? ? ??? ? ? ? ??? ? ??? ? ? ? ??? pf ?????????? ? ???????? ? ?????????? quiescent current (per package) ???? ? ?? ? ???? i dd ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 5.0 10 20 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 0.005 0.010 0.015 ???? ? ?? ? ???? 5.0 10 20 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 150 300 600 ??? ? ? ? ??? adc ?????????? ? ???????? ? ? ???????? ? ? ???????? ? ?????????? total supply current (3) (4) (dynamic plus quiescent, per package) (c l = 50 pf on all outputs, all buffers switching) ???? ? ?? ? ? ?? ? ? ?? ? ???? i t ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 15 ????????????????? ? ??????????????? ? ? ??????????????? ? ? ??????????????? ? ????????????????? i t = (4.1 a/khz) f + i dd i t = (14 a/khz) f + i dd i t = (140 a/khz) f + i dd ??? ? ? ? ? ? ? ? ? ? ??? adc ?????????? ?????????? 3-state output leakage current ???? ???? i tl ??? ??? 15 ??? ??? - ??? ??? 0.1 ???? ???? - ??? ??? 0.0001 ???? ???? 0.1 ??? ??? - ??? ??? 3.0 ??? ??? a 2. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance. 3. the formulas given are for the typical characteristics only at 25 c. 4. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l 50) vfk where: i t is in a (per package), c l in pf, v = (v dd v ss ) in volts, f in khz is input frequency, and k = 0.001.
mc14094b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? switching characteristics (5) (c l = 50 pf, t a = 25 c) ??????????????? ??????????????? characteristic ????? ????? symbol ???? ???? v dd vdc ???? ???? min ???? ???? typ (6) ???? ???? max ??? ??? unit ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? output rise and fall time t tlh , t thl = (1.35 ns/pf) c l + 33 ns t tlh , t thl = (0.6 ns/pf) c l + 20 ns t tlh , t thl = (0.4 ns/pf) c l + 20 ns ????? ? ??? ? ? ??? ? ????? t tlh , t thl ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ???? 100 50 40 ???? ? ?? ? ? ?? ? ???? 200 100 80 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ? ????????????? ? ??????????????? propagation delay time clock to serial out qs t plh , t phl = (0.90 ns/pf) c l + 305 ns t plh , t phl = (0.36 ns/pf) c l + 107 ns t plh , t phl = (0.26 ns/pf) c l + 82 ns ????? ? ??? ? ? ??? ? ? ??? ? ????? t plh , t phl ???? ? ?? ? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ? ?? ? ???? 350 125 95 ???? ? ?? ? ? ?? ? ? ?? ? ???? 600 250 190 ??? ? ? ? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? clock to serial out q's t plh , t phl = (0.90 ns/pf) c l + 350 ns t plh , t phl = (0.36 ns/pf) c l + 149 ns t plh , t phl = (0.26 ns/pf) c l + 62 ns ????? ? ??? ? ? ??? ? ????? ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ???? 230 110 75 ???? ? ?? ? ? ?? ? ???? 460 220 150 ??? ? ? ? ? ? ? ??? ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? clock to parallel out t plh , t phl = (0.90 ns/pf) c l + 375 ns t plh , t phl = (0.35 ns/pf) c l + 177 ns t plh , t phl = (0.26 ns/pf) c l + 122 ns ????? ? ??? ? ? ??? ? ????? ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ???? 420 195 135 ???? ? ?? ? ? ?? ? ???? 840 390 270 ??? ? ? ? ? ? ? ??? ??????????????? ? ????????????? ? ??????????????? strobe to parallel out t plh , t phl = (0.90 ns/pf) c l + 245 ns t plh , t phl = (0.36 ns/pf) c l + 127 ns t plh , t phl = (0.26 ns/pf) c l + 87 ns ????? ? ??? ? ????? ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? ? ? ? ???? ? ?? ? ???? 290 145 100 ???? ? ?? ? ???? 580 290 200 ??? ? ? ? ??? ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? plh phl () l output enable to output t phz , t pzl = (0.90 ns/pf) c l + 95 ns t phz , t pzl = (0.36 ns/pf) c l + 57 ns t phz , t pzl = (0.26 ns/pf) c l + 42 ns ????? ? ??? ? ? ??? ? ????? t phz , t pzl ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ???? 140 75 55 ???? ? ?? ? ? ?? ? ???? 280 150 110 ??? ? ? ? ? ? ? ??? ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? phz , pzl () l t plz , t pzh = (0.90 ns/pf) c l + 180 ns t plz , t pzh = (0.36 ns/pf) c l + 77 ns t plz , t pzh = (0.26 ns/pf) c l + 57 ns ????? ? ??? ? ? ??? ? ????? t plz , t pzh ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ???? ? ?? ? ? ?? ? ???? 225 95 70 ???? ? ?? ? ? ?? ? ???? 450 190 140 ??? ? ? ? ? ? ? ??? ??????????????? ? ????????????? ? ??????????????? setup time data in to clock ????? ? ??? ? ????? t su ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 125 55 35 ???? ? ?? ? ???? 60 30 20 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? hold time clock to data ????? ? ??? ? ????? t h ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 0 20 20 ???? ? ?? ? ???? 40 10 0 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? clock pulse width, high ????? ? ??? ? ????? t wh ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 200 100 83 ???? ? ?? ? ???? 100 50 40 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? clock rise and fall time ????? ? ??? ? ????? t r(cl) t f(cl) ???? ? ?? ? ???? 5 10 15 ???? ? ?? ? ???? ? ? ? ???? ? ?? ? ???? ? ? ? ???? ? ?? ? ???? 15 5.0 4.0 ??? ? ? ? ??? s ??????????????? ? ????????????? ? ??????????????? clock pulse frequency ????? ? ??? ? ????? f cl ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? ? ? ? ???? ? ?? ? ???? 2.5 5.0 6.0 ???? ? ?? ? ???? 1.25 2.5 3.0 ??? ? ? ? ??? mhz ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? strobe pulse width ????? ? ??? ? ? ??? ? ????? t wl ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 200 80 70 ???? ? ?? ? ? ?? ? ???? 100 40 35 ???? ? ?? ? ? ?? ? ???? ? ? ? ??? ? ? ? ? ? ? ??? ns 5. the formulas given are for the typical characteristics only at 25 c. 6. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance.
mc14094b http://onsemi.com 5 3?state test circuit for t phz and t pzh v ss for t plz and t pzl v dd 1 k output 50 pf o.e. clock st data register stage 1 block diagram latch 1 3-state buffer 1 15 2 serial data in output enable clock clock strobe clock clock clock clock strobe strobe strobe v dd 4 5 6 7 14 13 12 11 10 9 q1 q2 q s q3 q4 q5 q6 q7 q8 q s 2 3 4 5 6 7 8 register stage 2 register stage 3 register stage 4 register stage 5 register stage 6 register stage 7 register stage 8 latch 2 latch 3 latch 4 latch 5 latch 6 latch 7 latch 8 3-state buffer2 3-state buffer3 3-state buffer4 3-state buffer5 3-state buffer6 3-state buffer7 3-state buffer8 clock clock strobe strobe clock clock clock clock clock clock strobe strobe clock strobe 3 1 *input protection diodes * * * *
mc14094b http://onsemi.com 6 10 dynamic timing diagram 3 15 clock 2 data in 1 strobe output enable n q1 q7 9 q s q s t wh 50% t su t h t wl 50% t r t f 90% 10% 50% 50% t pzl t pzh t phz t phl t plh t plh t plz 10% 90% 10% 90% 90% 90% 10% 10% 50% 50% 50% 50% t phl t plh t thl t tlh t plh t phl
mc14094b http://onsemi.com 7 package dimensions pdip?16 p suffix plastic dip package case 648?08 issue t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ?a? b f c s h g d j l m 16 pl seating 18 9 16 k plane ?t? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 soic?16 d suffix plastic soic package case 751b?05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ?b? ?a? m 0.25 (0.010) b s ?t? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
mc14094b http://onsemi.com 8 package dimensions tssop?16 dt suffix plastic tssop package case 948f?01 issue a ??? ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. section n?n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 -u- s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ?t? ?v? ?w? 0.25 (0.010) 16x ref k n n
mc14094b http://onsemi.com 9 package dimensions h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z soeiaj?16 f suffix plastic eiaj soic package case 966?01 issue o
mc14094b http://onsemi.com 10 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc14094b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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